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1 1111 110 Internal ROM

Nand

Flash

4096k page size,

addressing cycle

is 5 clock

X 1111 111 Internal ROM

access1

Figure-2.5

IDEA6410 Supports NOR Flash, Nand Flash, SD Card startup mode, please see the blue

part of above picture. Also the picture-2.6 is a part of IDEA6410 startup mode.

Picture-2.6

On above picture-2.6, “OM0” is chip S3C6410 clock source select signal. It selects

“XTIpll “ when “OM0” is “0”, it select “EXTCLK” when “OM0” is “1”. The IDEA6410 uses

“XTIpll”.

“SELNAND” is a signal of selecting memory type, it is high level when selects NAND Flash,

it is low level when selects ONENAND. IDEA6410 uses NAND Flash.

EINT13-EINT15 are device selected pins of IROM startup mode, when adopts IROM

startup mode, the main chip S3C6410 runs settled program in advance then reads

EINT15,EINT14,EINT13 three pins' status with different configuration to select startup

device, the detailed configuration please see figure-2.5.

It is IROM startup mode when user selected SD Card as startup device. At this mode,

EINT15, EINT14, EINT13 are low level. So the user will see on IDEA6410 ,there signals

EINT15,EINT14,EINT13 are directly connected ground.

DBGSEL is JTAG interface call select signal, about it detail, please see the chapter 4.3.

On IDEA6410 Single Board Computer, the three pins EINT13-15 had been set into low

level, please select startup mode by configuring OM1-OM4 and SELNAND, the switch

SW1 moves to subject place, please see below figure-2.5 of SW1 configuration.

IDEA6410 Hardware Reference Guide

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Boardcon Idea6410 Manual de usuario Pagina 13